1. Field of the Invention
The present invention generally relates to forming a capacitor in an integrated circuit. Such capacitors form, for example, the storage element of a DRAM cell.
2. Discussion of the Related Art
FIGS. 1A and 1B schematically illustrate, in cross-section and top view, respectively, a portion of a DRAM cell structure at an intermediary stage of its formation in an integrated circuit according to a conventional manufacturing method. Each DRAM cell includes a MOS control transistor and a capacitor having an electrode in contact with a region of substrate 1, typically a source/drain region of the control transistor. It is here assumed that the MOS transistors (not shown) have already been formed in a semiconductor substrate 1. It should be noted that xe2x80x9csubstratexe2x80x9d designates a uniformly doped silicon wafer as well as epitaxial layers and/or layers specifically doped by diffusion/implantation formed on or in a massive substrate. Such wafers or regions may further have been previously silicided, at least partially.
An insulating layer 2, typically made of silicon oxide, is formed on substrate 1. Layer 2 is provided with first openings typically square-shaped in top view.
Each of these openings is filled with a conductive pad 3, typically made of tungsten or polysilicon. Pads 3 are in contact with source/drain regions (not shown) of the control transistors.
The structure is coated with an insulating layer 4, typically silicon oxide. In layer 4 are formed second openings to expose the upper surface of pads 3. The second openings typically have a rectangular shape in top view.
A second conductive layer 5 is formed on the walls and bottoms of the second openings. This layer 5 results, for example, from a conformal polysilicon deposition followed by a chem-mech etching of the portion of polysilicon deposition covering the upper surface of layer 4.
A first electrode 5 of a capacitor in electric contact with an underlying substrate 1 via a conductive pad 3 has thus been formed. Electrode 5 has a flat-bottom cup shape. Indeed, the electrode has in cross-section (FIG. 1A) vertical walls and a horizontal bottom, and has in top view (FIG. 1B) substantially the shape of a rectangle. At this stage of the manufacturing, as illustrated in FIG. 1A, the inside of the cup formed by electrode 5 is empty. As illustrated in FIGS. 1A and 1B, the horizontal bottom of electrode 5 is in contact substantially by its middle with the top of pad 3.
The structure thus obtained and shown in FIGS. 1A and 1B is then completed by the conformal deposition of an insulator (not shown), followed by the deposition and etching of a conductive layer (not shown) forming a second electrode that may be common to several capacitors.
To improve the performance of integrated memories, the electronic industry now requires increasing the capacitance of the capacitors forming the storage nodes of DRAM cells without reducing the memory density or increasing the memory density without reducing the capacitor capacitance.
An object of the present invention is to provide a novel integrated capacitor structure having a greater capacitance.
Another object of the present invention is to provide such a structure in which the contact between the conductive pad and the first electrode is improved.
To achieve these and other objects, the present invention provides a capacitor having an electrode with a general cup shape, including a generally horizontal bottom and vertical walls, and in electric contact by its bottom with a conductive pad, the pad extending beyond the upper surface of an insulating layer and the bottom including a recess complementary to the protruding pad portion.
According to an embodiment of the present invention, the electrode is made of polysilicon.
According to an embodiment of the present invention, the pad is made of tungsten.
According to an embodiment of the present invention, the pad is made of polysilicon.
According to an embodiment of the present invention, the insulating layer is made of silicon oxide.
According to an embodiment of the present invention, said electrode is formed of two distinct elements each being substantially cup-shaped, and each being in electric contact with a portion of the pad.
The present invention also provides a method of manufacturing a capacitor, including the steps of:
Forming, in a first insulating layer, a first opening to expose a chosen region of a semiconductor substrate;
depositing and etching a first conductive layer to form a conductive pad in the first opening;
depositing a second insulating layer;
forming, in the second insulating layer and the first insulating layer, a second opening, so that the pad protrudes from the first insulating layer;
conformally depositing a second conductive layer;
etching the second conductive layer to remove its horizontal portions resting on the second insulating layer;
conformally depositing a thin dielectric; and
depositing and etching a fourth conductive layer.
According to an embodiment of the present invention, the first and second conductive layers are made of silicon oxide.
According to an embodiment of the present invention, the etching of the second conductive layer is a chem-mech etching.
The present invention also provides a method of manufacturing a capacitor, including the steps of:
forming, in a first insulating layer a first opening to expose a chosen region of a semiconductor substrate;
depositing and etching a first conductive layer to form a conductive pad in the first opening;
depositing a second insulating layer;
forming, in the second insulating layer and the first insulating layer, second adjacent openings separated by an insulating strip narrower than the pad and substantially centered on the pad;
conformally depositing a second conductive layer;
etching the second conductive layer to remove its horizontal portions resting on the second insulating layer;
conformally depositing a thin dielectric; and
depositing and etching a fourth conductive layer.
According to an embodiment of the present invention, the first openings have in top view dimensions of 0.3xc3x970.23 xcexcm and the second openings have dimensions of 0.3xc3x970.5 xcexcm.
The foregoing objects, features and advantages of the present invention will be discussed in detail in the following non-limiting description of specific embodiments in connection with the accompanying drawings.